1. Field of the Invention
The present invention relates to a lithography simulation method, computer program product, and pattern forming method used in a semiconductor field.
2. Description of the Related Art
As miniaturization of semiconductor circuits is progressing, a transistor line width of 50 nm or less and a wiring pitch of 200 nm or less are necessary in the non-memory semiconductor integrated circuits such as MPU, ASIC and system LSI. In recent years, the miniaturization of a memory cell pitch of Flash memory products as well as the miniaturization of the transistor lien width promotes a development of lithography technique.
On the other hand, as to a corresponding development of exposure technique (advancing of resolution), shortening of an exposure light wavelength stops at KrF (248 nm) to ArF (193 nm), and F2 (157 nm) development is out of a load map due to a problem such as of optical system. As candidates of NGL (Next Generation Lithography), EUVL (Extreme Ultra Violet Lithograph: wavelength: X ray with wavelength of 13.5 nm is used), EB (Electron Beam), NIL (Nano Imprint Lithography) and the like are developed, but they are not yet put to practical use.
The resolution is expressed by k (constant)×λ (wavelength)/NA (numerical aperture). For this reason, the manufacturers of exposure apparatuses realize high NA using an immersion exposure apparatus so as to heighten the resolution, and lengthen the life of ArF exposure since 2000s. As a result, a mask pattern has a structure whose size is equivalent to that of an exposure wavelength, and thus a deviation from the so-called Kirchhoff diffraction theory is getting more and more obvious. When further the miniaturization progresses, an extreme resolution enhancement technique (for example, dipole illumination+assist feature, small σ+Levenson phase shift mask) is required.
Since the resolution becomes high and a coherence area on a wafer (space coherence area) becomes larger than a conventional one in normalized dimension (normalized by wavelength/numerical aperture) equivalent, a distance affected by optical proximity effect on the wafer becomes relatively large.
In order to estimate an optical image on the wafer by using conventional lithography simulation method without lowering accuracy, an exact electromagnetic field analytical calculation (3D exact electromagnetic field calculation) should be conducted on a large area sufficiently wide for the distance affected by optical proximity effect on the wafer by using FDTD (finite difference time area) method (Jpn. Pat. Appln. KOKAI Publication No. 2007-248391), or RCWA (rigorous coupled wave analysis) method or the like. However, the 3D exact electromagnetic field calculation on the large area has a problem that enormous amount of calculation time is required.